|
More than 68,000 students have been trained in semiconductor chip design and 254 chip designs have been successfully taped out under the government's Chips to Start-ups (C2S) Programme as per the Ministry of Electronics and Information Technology.
The programme is aimed at building an industry-ready talent pool and strengthening chip design capabilities in the country as India expands its domestic semiconductor ecosystem. In a release issued on Friday, the Ministry said, "More than 68,000 students have been trained under the programme so far." The C2S Programme aims to generate 85,000 industry-ready professionals at B.Tech, M.Tech and PhD levels specialising in semiconductor chip design. The Ministry said the programme was initiated for "capacity-building across the country and to address the issue of workforce talent gap and chip design infrastructure in the semiconductor design area." Apart from training students, participating academic institutions have successfully taped out 254 chip designs. Tape-out refers to the stage when a completed chip design is sent to a semiconductor foundry for manufacturing. "Participating institutions have successfully taped out 254 chip designs, comprising 175 designs at the 180 nm technology node at SCL, Mohali, and 79 designs at overseas semiconductor foundries," the Ministry said. The government has also provided 332 academic institutions across the country with access to advanced Electronic Design Automation (EDA) tools used for designing and developing semiconductor chips. These include tools from companies such as Synopsys, Cadence, Siemens EDA, Ansys, Keysight, Silvaco and AMD-Xilinx, among others. The Ministry also highlighted semiconductor research projects being supported at academic institutions in Andhra Pradesh, including work on a secure RISC-V processor for cryptographic applications at IIT Tirupati and a hardware accelerator for high-performance computing and cyber-physical systems at IIITDM Kurnool. Other projects include an energy-efficient neuromorphic processor for edge Internet of Things applications at NIT Andhra Pradesh and a memory-efficient co-processing unit for edge artificial intelligence applications at Shri Vishnu Engineering College for Women, Bhimavaram. "The projects are currently at various stages of design and development," the Ministry said, adding that depending on their scope and maturity, they are expected to progress towards prototype validation, including tape-out at semiconductor foundries wherever applicable. (ANI)
|
