Alchimer S.A., leading provider of technology for the deposition of nanometric films used in both semiconductor interconnects and 3D through-silicon vias (TSV), has demonstrated that TSVs with aspect ratios of 20:1 can save chipmakers more than $700 per 300-mm wafer compared to TSVs with ratios of 5:1, by reducing the die area needed for interconnection.

Alchimer modeled TSV costs and space consumption using an existing 3D processor stack for mobile applications that includes a low-power microprocessor, NAND memory chip and a DRAM chip using 65nm process technology. The chips are connected by about 1,000 TSVs, and the microprocessor die area required for the TSVs was calculated for aspect ratios of 5:1, 10:1 and 20:1. The comparison included the same via depth in all cases. Decreasing the TSV diameter increased the aspect ratio. The 5:1 scenario consumed 12.3 percent of die area, while a 20:1 approach consumed just 0.8 percent (see Table 1). Applying standard cost modeling, Alchimer found a $731 per wafer cost differential between the two.

Companies in the microelectronics industry have grappled with process integration issues related to fabricating the high aspect ratio structures, and some have suggested staying with low aspect ratio designs that are more compatible with traditional dry-processing approaches. The new study, however, provides compelling evidence of the ongoing economic benefits to be gained from the more-advanced via structures.

The more efficient use of wafer space represents a new level of cost savings for Alchimer’s AquiVia, a wet deposition process that can easily deposit top-quality films in vias with aspect ratios of 20:1 or higher, while also reducing overall cost of ownership for TSV metallization by up to 65 percent compared to conventional dry processes.

AquiVia already enables customers to use existing plating equipment for the deposition of isolation, barrier and seed layers, eliminating all dry processing techniques from TSV metallization, and requiring minimal investment in new equipment.

“This new data clearly quantifies the benefits of high aspect ratio vias and their reduced need for valuable silicon real estate. Use of these structures allows designers to put more value-added circuitry on their dies, or use smaller dies,” said Steve Lerner, CEO of Alchimer. “Either way, the more-advanced technology makes excellent economic sense – particularly when there is a robust and inexpensive metallization process available. As the industry works its way out of the downturn, it’s an ideal time to consider the more practical allocation of capital enabled by the AquiVia technology.”

Alchimer’s study found that a 3X improvement in aspect ratio allows an 8X increase in the number of TSVs in a given area.

The AquiVia wet deposition processes for isolation, barrier and seed layers in TSV metallization uses electrografting, a nanotechnology solution based on surface chemistry formulations and processes, to grow highly conformal and uniform layers in TSVs with aspect ratios up to and beyond 20:1, even on the highly scalloped etch profiles produced by the DRIE/Bosch process.

TABLE 1: Silicon Consumption as a Function of TSV Aspect Ratio

(Average TV density = 16 TSVs/mm^2; die size = 8x8mm)

About Alchimer S.A.

Alchimer develops and markets innovative chemical formulations, processes and IP for the deposition of nanometric films used in both semiconductor interconnects and 3D TSVs (through-silicon vias). The company’s breakthrough technology, Electrografting (eG™), is an electrochemical-based process that enables the growth of very thin coatings, of various types, on both conducting and semiconducting surfaces. Based in Massy, France, Alchimer is a spin-off from the Commissariat à l’Energie Atomique (CEA). Founded in 2001, it won the First National Award for the Creation of High Tech Companies from the French Minister of Research and Industry and is a Red Herring Top 100 European Company.